Keynote 1
Securing the Next Trillion of Chips via In-Memory and Immersed-in-Logic Design – Beyond Traditional Design Boundaries
Speaker: Massimo Alioto
Abstract
In this keynote, the road towards truly ubiquitous hardware security is pursued from a primitive design perspective, designing PUFs and TRNGs that are inherently immersed in existing memory arrays and logic fabrics. Breaking the boundaries of traditional system partitioning is shown to bring fundamental benefits in silicon area, design and system integration effort, technology and design portability, physical-level obfuscation and stricter data locality enforcement. This ultimately enables the embedment of security features in the next trillion of chips that will populate our planet.
Short Bio
Massimo Alioto (M’01–SM’07-F’16) received the MSc degree in Electronics Engineering and the Ph.D. degree in Electrical Engineering from the University of Catania (Italy) in 1997 and 2001. He is currently a Professor at the Department of Electrical and Computer Engineering, National University of Singapore, where he leads the Green IC group, and is the Director of the Integrated Circuits and Embedded Systems area, and the FD-FAbrICS research center at NUS. Previously, he held positions at the University of Siena, Intel Labs – CRL (2013), University of Michigan Ann Arbor (2011-2012), BWRC – University of California, Berkeley (2009-2011), and EPFL (Switzerland, 2007). He has authored or co-authored more than 300 publications on journals and conference proceedings. He is author of four books, including Enabling the Internet of Things - from Circuits to Systems (Springer, 2017), and the latest on Adaptive Digital Circuits for Power-Performance Range beyond Wide Voltage Scaling (Springer, 2020). His primary research interests include self-powered wireless integrated systems, near-threshold circuits for green computing, widely energy-scalable integrated systems, data-driven integrated systems, hardware security, and emerging technologies, among the others. He is the Editor in Chief of the IEEE Transactions on VLSI Systems (2019-2020), and was the Deputy Editor in Chief of the IEEE Journal on Emerging and Selected Topics in Circuits and Systems (2018). In 2020-2022 he is Distinguished Lecturer of the IEEE Solid-State Circuits Society. In 2009-2010 he was Distinguished Lecturer of the IEEE Circuits and Systems Society, for which he is/was also member of the Board of Governors (2015-2020), and Chair of the “VLSI Systems and Applications” Technical Committee (2010-2012). He served as Guest Editor of several IEEE journal special issues, and Associate Editor of a number of IEEE and ACM journals. He is/was Technical Program Chair and Track Chair in a number of IEEE conferences (e.g., ISCAS 2023, SOCC, ICECS), and is currently in the IEEE “Digital architectures and systems” ISSCC subcommittee, and the ASSCC TPC. Prof. Alioto is an IEEE Fellow.
Keynote 2
Defending CyberPhysical Systems and Infrastructures from Cyber Attacks
Speaker: Alberto Sangiovanni Vincentelli
Abstract
Attacks against critical infrastructure such gas pipelines, power generation and water treatment plants, as well as against cars and airplanes are very possible and may create disruptions that we can only start imagining. The talk frames the problem and describes the industrial landscape in this domain.
Short Bio
Alberto Sangiovanni Vincentelli is the Edgar L. and Harold H. Buttner Chair of Electrical Engineering and Computer Sciences at the University of California, Berkeley. In 2001, he received the Kaufman Award for his pioneering contributions to EDA from the Electronic Design Automation Consortium. In 2011, he was awarded the IEEE/RSE Maxwell Medal “for groundbreaking contributions that have had an exceptional impact on the development of electronics and electrical engineering or related fields”. He co-founded Cadence and Synopsys, listed in NASDAQ with market cap of over 40 Billion USD. He presently serves on the Board of Directors of Cadence Design Systems Inc., KPIT Technologies, Cogisen, Expert System, and UltraSoC (Chairman of the Board). He consulted for Intel, HP, TI, ST Microelectronics, Mercedes, BMW, Magneti Marelli, Telecom Italia, United Technologies, Camozzi Group, Pirelli, General Motors, UniCredit and UnipolSAI. He is also serving as member of the Advisory Board of the Politecnico di Milano, and as Chairman of the International Advisory Council of MIND (Milano Innovation District). He is a member of the United States National Academy of Engineering, an IEEE and ACM Fellow. He received an honorary Doctorate from Aalborg University (Denmark) and one from KTH (Sweden). He has published more than 950 papers and 19 books.
